Feels like DDR5 capabilities have been running away from what boards and memory controllers can reasonably support, bar the lowest amount of ranks/channels and non-optimal clock ratios.
this post was submitted on 29 Nov 2023
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And it's so painful for me since my workload is completely memory bandwidth bound but does not scale across multiple sockets, much less multiple nodes.
96 cores per socket? ๐
12 channels of ram per socket? ๐คฉ
DDR5-4800? ๐ซ
Just curious, but what workload doesn't scale across multiple sockets? Gaming?
A specialized computational fluid dynamics program. And nominally CFD is great to scale across many sockets/systems but it seems this particular program wasn't written to be able to do that.
Ddr6 and new sockets and boards going to come out very soon probably
DDR6 is years away.
According to what?
Ultra-high density chips is exactly what you want to support the largest possible memory amounts and speeds with minimal ranks. With 32 Gib chips, you could build 32 GiB single-rank UDIMMs, or 64 GiB dual-rank.
That means up to 128 GiB of RAM in mini-ITX!
well technically the high freq chips right now are out of spec and overclocked. people just don't care because chances are good that they work. XMP/EXPO are overclocks but people treat them like standard settings.
so it makes sense that current IMCs and boards are struggling with these speeds since they're far out of the spec they were designed for years ago.
runs at 1.1v too. It's basically JEDEC 8000. Arrowlake probably should support this next year.
Not just that, that means higher voltage kits with that could be like 8800 CL32.
Those are RDIMMs, not UDIMMs, those won't work on consumer platforms.