this post was submitted on 12 Nov 2023
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I'm curious, is it possible to make APU with 3D cache? Is it probable AMD will make one at some point?
All APUs so far been Mobile chips ported to desktop socket. These chips doesn't have 3Dcache as cuz they have to support them -- must have connectors that enable them to be linked. So no, there is not such for now. Yes, they can do one in the future.
I hope AMD can create a mobile APU with a 3D V-cache in it. That will be on the next steam deck for sure
Technically yes, but AMD had used monolithic dies for their APUs for years and trying to add cache on top of a bigger piece of silicon than a CPU chiplet would need a redesign at least and it would jack up prices quite significantly and most likely we would only see a single SKU with it.
I'd guess a better alternative would be a chiplet based APU that's similar to Navi 32/31 design (GPU die surrounded by cache chiplets). It would be quite malleable, you could add a Zen X/Zen XC chiplet (or a hybrid of both that you can add 3D V-Cache on top if you wish), a GPU chiplet and a cache chiplet to keep more data to the GPU so it's less reliant on RAM bandwidth.
Probably AMD may do that in the near future with a RDNA 4/5 APU, the main problem is power consumption (Transferring data between chiplets consumes more power than a monolithic chip with all of its components in a single die) and that would be a significant downside for mobile devices, that's why they haven't made a chiplet based APU yet and it's easier to just recycle/resell any laptop APU as a desktop one.
Also there is HBM memory route. Shame that this technology isn't cheaper.
Yes, for the looks of it Intel's alternative to compete with 3D V-Cache is something akin to HBM but more efficient, I bet Intel would use it for their integrated graphics.
It is quite sad that HBM hasn't decreased in price significantly for it to be embedded in consumer APUs, even 2/4 GB wouldn't be that bad if HBCC (Uses system RAM as VRAM and HBM is used to cache data) could be used.
Techunically IMPOSSIBLE. Not on any existing APU chips or Zen4c chiplet. There's no TSV contacts to connect the cache.
It'll require a complete redesign of the chip. But it's possible if AMD did that.
Irrelevant.
No. Size is completely irrelevant. Redesign is needed indeed, but it's the APU that needed redesign, not the cache.
No. The filler silicon ALSO USED ON CURRENT X3D costs a few cents at most. Even 200mm² costs pennies.
Intel kinda did it back in the day with 5th gen.
Why wouldn't it be impossible? The 3d Cache sits on top of the ordinary cache and gets data and power connections through vias embedded in the sillicon of the ordinary L3 cache. The distinction that desktop CPUs are chiplet based vs the mobile chips that are monolythic is not valid, because each chiplet is monolythic by itself and can obviously have 3d cache. So, if it suits them AMD can make 3d cache variants of their mobile chips. What's needed is for them to decide that it's worth it, then embed the vias in All the silicon (as in the Zen 3 line) and then pull the trigger sometime down the line when they decide that the market conditions are right.
The valid distinction here is that 3d cache is often very useful in server applications, while in normal PCs and laptops it benefits mostly gaming. And, the same chiplets are first binned for server... We gamers happen to enjoy this technology by accident in a way. Having in mind how bandwidth starved are all the CUs in the APUs it will be a godsend for sure. Will AMD do it, considering that they do have the vias in the chiplets in the high end GPUs and still haven't done it there... Well..
Not sure now if I'm mistaken on what an APU is, but my recently bought 7950x3d has 3d cache and an integrated gpu. Vega I think. Is this not an APU?