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Not that I disagree with you but what's stopping any ARM or RISC-V CPU manufacturer from putting their own version of IME in their chips?

There's ARM, with Snapdragon, Mediathek, Broadcom, Nvidia, Apple and Ampere. Contrary to RISC-V it's already used in many computers.

What is the amd equivalent?

Duopolys might be worse. The illusion of choice and opponent security.

Open standard CPU instruction set. Meaning people can design new chips for it without needing to enter an expensive license agreement.

Because it's an open Instruction Set Architecture.

Many different companies used to design their own CPU IS architectures in the past like (MIPS, AVR, PIC, ...) and of course the most popular ARM. Downside of this is that the software and ecosystems between these architectures are not compatible. Effort wasted in porting a library to one architecture cannot be always reused for another.

Recently we see a lot of companies adopting RiscV, and there is a big collaboration between them to ratify the specification and provide software support. This will in turn accelerate the development, and software and hardware support will hopefully overtake ARM in the future.

It's an open standard that enables open source implementation (and several industry supported options exist), most notably IMO xiangshan and vroom

Its completely open source

Because we’re getting risc one way or another and the two targets are risc-v and arm. All the phones, tablets, mini pcs and apple made the jump to either arm or risc-v.

The porterbox is a HiFie Unmatched.

Here you go: RISC-V Exchange: Available Boards
EDIT: Good luck finding any boards in stock. Sorry.

Another option: Pine64's board

The advantages that we'll see come from the implementation more than the spec, but having an open standard for the ISA allows more companies to make implementations and to innovate.

The true benefits will be ~10 years in, when RISCV chip designers are more experienced and have had time to innovate and build good IP blocks.

E.g. companies that make ARM SoCs are pick'n mix'ing IP from ARM, and adding their own special sauce on top. The future in RISCV comes from having many companies that compete to make intercompatible IP, which hardware vendors like Qualcomm and Rockchip can then licence to make SoCs out of.

There is benefit to RISCV, over ARM but mostly that comes down to:

• not having legacy compatibility to maintain.
• having a frozen spec that is less likely to slowly get feature creep like x86 & ARM.
• having hindsight for things like vector extension implementations & macro-op fusion.

It's predominantly the first one. They have made a few unique design decisions, but is a fairly conservative "boring" RISC design. The only thing remarkable I can think of of the core ISA is the fact that they have no conditional status registers (no NZVC bits), so you have to kind of combine conditions and branches together, but that's not exactly unprecedented (MIPS did something similar).

In the ISA extensions, there is still some instability and disagreement about the best ISA design for some parts. Just the fact that RISC-V is going to have both SIMD and Vector instructions is a bit unique, but probably won't make a huge difference.

But it's a fairly boring RISC design which is free and open and without any licensing hoops to jump through, which is the most interesting bit.

Personally I’d rather run one of these chips headless anyways.