Linux

As far as I understand it, wouldn't the cell library be more like the node equivalent of a KiCAD library for 0402 passive footprints for PCB design? Like here is how we must do gates, buses, etc. But that has nothing to do with the way the ALU is setup or the LCR aspects of a final design? I've honestly only watched Asianometry, skimmed Intro to VLSI a few times, dabbled in FPGA, built Ben Eater's bread board computer, and screwed around with a CPU scheduler to learn why my last computer sucked at complex CAD assemblies. When I was looking for AI hardware to run LLM's I went deep enough to understand the specific CPU limitation and upon learning about my phone's matrix coprocessor I tried learning enough to understand why the thing even exists. That lead me to the understanding that a model can be designed for a specific architecture and run MUCH faster and smaller. I explain things as they sit on my road map of understanding, and knowing I'm likely wrong on the edge cases. I am no expert. I'm trying to give anyone enough rope to pull on so that I can find out here I'm wrong and learn. I share because I want to learn, I want to be wrong, but only in a way that I can extend incrementally from my mental roadmap.