this post was submitted on 21 Nov 2023
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* only on Intel, which has the L3 made out of slices attached to each P-core or E-core cluster (x4).
AMD segregates its L3 at the CCX level, so every part made from the same die set has the same L3. There's a bit of a complication with the 12 and 16 core, because if all the threads are working on the same data the L3 is effectively 1-CCD-sized, but if they're working on different data (like with
make -j
, VMs, or some batch jobs), you get the benefit of both CCD's worth of L3.