this post was submitted on 22 Nov 2023
0 points (50.0% liked)
Hardware
47 readers
1 users here now
A place for quality hardware news, reviews, and intelligent discussion.
founded 1 year ago
MODERATORS
you are viewing a single comment's thread
view the rest of the comments
view the rest of the comments
The way x86 instructions are variable length and not self-synchronizing means that you can see up to 15% of your core's power budget go to decode if you aren't running in the small cache of decoded instructions, at least a few generations ago when last I heard. That isn't huge but it does mean that x86 architects have to put thought into how wide to make it, they can't just size it to make sure it's never a bottleneck like ARM designers can.
Mate, the 90s were a few decades back. ;-)
x86 decoding hasn't been a limiter since then.
https://chipsandcheese.com/2021/07/13/arm-or-x86-isa-doesnt-matter/