this post was submitted on 20 Nov 2023
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TechPowerUp: "Intel Lunar Lake-MX SoC with On-Package LPDDR5X Memory Detailed" (www.techpowerup.com)
submitted 10 months ago by [email protected] to c/[email protected]
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[–] [email protected] 1 points 10 months ago (6 children)

My two best guesses for why TSMC N3B is used for the compute tile:

  1. The Compute Tile has the x86 Cores, NPU, and iGPU. Because of this, 20A couldn't be used. It could've been either Intel 3, N3B, or wait for 18A. N3B was likely the best choice

  2. ARL and LNL were developed in Tandem, one using internal foundries, the other external, as a post-10nm risk mitigation. Development for these CPUs likely began somewhere around 2020.

[–] [email protected] 1 points 10 months ago (1 children)
  1. Intel doesn't have enough supply for themselves and clients for leading edge nodes. Intel makes more money if they let IFS clients to buy their nodes and Intel themself get nodes from TSMC
[–] [email protected] 1 points 10 months ago

No one really cares about Intel's nodes pre-18A, and that theory doesn't work regardless.

Also, Intel needs to prove the node in their own products before others will bite.

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