this post was submitted on 15 Nov 2023
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It isn't a major architecture update. Nvidia's slides from Ampere's release stated that the next two architectures after Ampere would be part of the same family.
Performance gains will be had by improving the RT & tensor cores, using an improved node, probably N4X, to facilitate clock speed increases at the same voltages, and by increasing the number of SMs across the product stack. The maturity of the 5nm process will allow Nvidia to use larger die than they could in Ada.
and HW support for DLSS features and CUDA as a programming platform.
It might be "a major architecture update" by the amount of work that Nvidia engineering will have to put in to pull off all the new features and RT/TC/DLSS/CUDA improvements without regressing PPA - that's where the years of effort will be sunk - and possibly large improvements in perf in selected application categories and operating modes, but a very minor improvement in "perf per SM per clock" in no-DLSS rasterization on average.
lmao