this post was submitted on 22 Nov 2023
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This is just a nitpicking question. Do Intel chips still have some space/transistors dedicated to SSE3? If they do, why can't they implement SSE3 by other, more powerful instrutions (like AVX) to save die space?

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[–] [email protected] 0 points 10 months ago (7 children)

The x86 instructions go through a translation layer that turns them into CPU specific instructions (microcode). So the CPU doesn't need any specific hardware to be compatible with these old instructions, it just needs to know how to get the same result with microcode.

[–] [email protected] 1 points 10 months ago (1 children)

You are confusing microcode and micro-ops.

[–] [email protected] 1 points 10 months ago (1 children)
[–] [email protected] 1 points 10 months ago

It's a way of creating a sequential control circuit based on a piece of memory holding the outputs and next state for each state.

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